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NB3V8312C: 1-TO-12 LVCMOS/LVTTL

Overview
Specifications
Datasheet: Ultra-Low Jitter, Low Skew 1:12 LVCMOS/LVTTL Fanout Buffer
Rev. 1 (153kB)
»Показать химический состав
»Уведомление об обновлениях схем (1)
GreenPoint® Design Tool
Product Overview
Описание продукта
The NB3V8312C is a high performance, low skew LVCMOS fanout buffer which can distribute 12 ultra-low jitter clocks from an LVCMOS/LVTTL input up to 250 MHz. The 12 LVCMOS output pins drive 50Ωseries or parallel terminated transmission lines. The outputs can also be disabled to a high impedance (tri-stated) via the OE input, or enabled when High. The NB3V8312C provides an enable input, CLK_EN pin, which synchronously enables or disables the clock outputs while in the LOW state. Since this input is internally synchronized to the input clock, changing only when the input is LOW, potential output glitching or runt pulse generation is eliminated. Separate VDD core and VDDO output supplies allow the output buffers to operate at the same supply as the VDD (VDD = VDDO) or from a lower supply voltage. Compared to single-supply operation, dual supply operation enables lower power consumption and output-level compatibility. The VDD core supply voltage can be set to 3.3 V, 2.5 V or 1.8 V, while the VDDO output supply voltage can be set to 3.3 V, 2.5 V, or 1.8 V, with the constraint that VDD >/= VDDO.
Отличительные черты
 
  • VDD core supply voltage can be set to 3.3 V, 2.5 V or 1.8 V
  • VDDO output supply voltage can be set to 3.3 V, 2.5 V, or 1.8 V, with the constraint that VDD >/= VDDO
  • 250 MHz Maximum Clock Frequency
  • Accepts LVCMOS, LVTTL Clock Inputs
  • 12 LVCMOS Clock Outputs
  • 150 ps Max. Skew Between Outputs
  • Temp. Range 40C to +85C
  • 32pin LQFP and QFN Packages
  • Synchronous Clock Enable
Применения   End Products
  • Networking
  • Telecom
  • Storage Area Networks
 
  • Servers
  • Routers
  • Switches
Технические информацие
Статьи по применению (6) Спецификацие (1)
Модели - Симуляция (1) Типы корпусов (1)
Наличие и образцы
Продукт
Состояние
Compliance
Описание
Корпус
MSL*
Контейнер
Бюджетная цена единицы
Тип
Размеры
Тип
Кол.
NB3V8312CFAG Active
Pb-free
Halide free
1-TO-12 LVCMOS/LVTTL LQFP-32 2 Tray JEDEC 250 Contact Sales Office
NB3V8312CFAR2G Active
Pb-free
Halide free
1-TO-12 LVCMOS/LVTTL LQFP-32 2 Tape and Reel 2000 Contact Sales Office
NB3V8312CMNG Active
Pb-free
Halide free
1-TO-12 LVCMOS/LVTTL QFN-32 488AM 1 Tube 74 Contact Sales Office
NB3V8312CMNR4G Active
Pb-free
Halide free
1-TO-12 LVCMOS/LVTTL QFN-32 488AM 1 Tape and Reel 1000 Contact Sales Office
* Уровень чувствительности компонента к влажности
Market Leadtime (weeks) : 4 to 8
Mouser   (2015-07-09) : <1K
Market Leadtime (weeks) : 8 to 12
Avnet   (2015-07-09) : >1K
Market Leadtime (weeks) : 2 to 4
Avnet   (2015-07-09) : <100
Mouser   (2015-07-09) : <100
ON Semiconductor   (2015-07-08) : 9,398
Market Leadtime (weeks) : 4 to 8
Datasheet: Ultra-Low Jitter, Low Skew 1:12 LVCMOS/LVTTL Fanout Buffer
Rev. 1 (153kB)
»Показать химический состав
»Уведомление об обновлениях схем (1)
GreenPoint® Design Tool
Product Overview

Product Compliance Status Description Type Channels Input / Output Ratio Input Level Output Level VCC Typ (V) tJitterRMS Typ (ps) tskew(o-o) Max (ps) tpd Typ (ns) tR & tF Max (ps) fmaxClock Typ (MHz) fmaxData Typ (Mbps) Package Type
 Pb-free 
 Halide free 
 Active     1-TO-12 LVCMOS/LVTTL   Buffer   1   1:12 
 LVCMOS 
 LVTTL 
 LVCMOS 
 1.8 
 2.5 
 3.3 
 0.03   150   1.5   700   250     LQFP-32 
 Pb-free 
 Halide free 
 Active     1-TO-12 LVCMOS/LVTTL   Buffer   1   1:12 
 LVCMOS 
 LVTTL 
 LVCMOS 
 1.8 
 2.5 
 3.3 
 0.03   150   1.5   700   250     LQFP-32 
 Pb-free 
 Halide free 
 Active     1-TO-12 LVCMOS/LVTTL   Buffer   1   1:12 
 LVCMOS 
 LVTTL 
 LVCMOS 
 1.8 
 2.5 
 3.3 
 0.03   150   1.5   700   250     QFN-32 
 Pb-free 
 Halide free 
 Active     1-TO-12 LVCMOS/LVTTL   Buffer   1   1:12 
 LVCMOS 
 LVTTL 
 LVCMOS 
 1.8 
 2.5 
 3.3 
 0.03   150   1.5   700   250     QFN-32 
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