Описание продукта
NB4N527S is a clock or data Receiver/Driver/Buffer/Translator capable of translating AnyLevel
TM input signal (LVPECL, CML, HSTL, LVDS, or LVTTL/LVCMOS) to LVDS. Depending on the distance, noise immunity of the system design, and transmission line media, this device will receive, drive or translate data or clock signals up to 2.5 Gb/s or 1.25 GHz, respectively.
The NB4N527S has a wide input common mode range of GND+50 mV to VCC-50 mV combined with two 50 Ω internal termination resistors is ideal for translating differential or single-ended data or clock signals to 350 mV typical LVDS output levels without use of any additional external components.
The device is offered in a small 3 mm x 3 mm QFN-16 package. NB4N527S is targeted for data, wireless and telecom applications as well as high speed logic interface where jitter and package size are main requirements.
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Отличительные черты |
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Maximum Input Clock Frequency up to 1.25 GHz
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Maximum Input Data Rate up to 2.5 Gb/s
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500 ps Maximum Propagation Delay
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300 ps Maximum Rise/Fall Times
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Single Power Supply; VCC = 3.3 V +/- 10%
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Temperature Compensated TIA/EIA644 Compliant LVDS Outputs
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Internal 50 Termination Resistor per Input Pin
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GND + 50 mV to VCC 50 mV VCMR Range
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Применения |
- OC-3 to OC-48 SDH/SONET Clock & Data Applications
- 1 GbE, 1G & 2G Fibrechannel Clock & Data Applications
- Precision LVDS Clock Buffering & Translation
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