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NLSF302: Quad 2-Input NOR Gate

Overview
Specifications
Packages
Datasheet: Quad 2-Input NOR Gate
Rev. 4 (68.0kB)
»Показать химический состав
»Уведомление об обновлениях схем (6)
Product Overview
Описание продукта
The NLSF302 is an advanced high speed CMOS 2-input NOR gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.

The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.
Отличительные черты
 
  • High Speed: tPD = 3.6ns (Typ) at VCC = 5 V
  • Low Noise: VOLP = 0.8 V (Max)
  • High Noise Immunity: VNIH = VNIL = 28% VCC
  • Power Down Protection Provided on Inputs
  • Balanced Propagation Delays
  • Designed for 2V to 5.5V Operating Range
  • Low Power Dissipation: ICC = 2?A (Max) at TA = 25 C
  • Function Compatible with Other Standard Logic Families
  • QFN-16 Package
  • Latchup Performance Exceeds 300mA
  • ESD Performance: HBM > 2000V; Machine Model > 200V
  • Chip Complexity: 40 FETs or 10 Equivalent Gates
  • Pb-Free Package is Available
Применения
  • Cell Phones
Технические информацие
Спецификацие (1) Типы корпусов (1)
Наличие и образцы
Продукт
Состояние
Compliance
Описание
Корпус
MSL*
Контейнер
Бюджетная цена единицы
Тип
Размеры
Тип
Кол.
NLSF302MNR2G Active
Pb-free
Halide free
Quad 2-Input NOR Gate QFN-16 485G-01 1 Tape and Reel 3000 $0.6667
* Уровень чувствительности компонента к влажности
Market Leadtime (weeks) : Contact Factory
ON Semiconductor   (2015-07-08) : 36,000
Datasheet: Quad 2-Input NOR Gate
Rev. 4 (68.0kB)
»Показать химический состав
»Уведомление об обновлениях схем (6)
Product Overview

Product Compliance Status Description Type Channels VCC Min (V) VCC Max (V) tpd Max (ns) IO Max (mA) Package Type
 Pb-free 
 Halide free 
 Active     Quad 2-Input NOR Gate   NOR   4   2   5.5   7.5   8   QFN-16 
Ранее просмотренные схемы
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